コード例 #1
0
ファイル: vector.go プロジェクト: rjammala/emgo
// UseHandler changes handler in currently used vector table.
func (e Exce) UseHandler(handler func()) {
	if int(e) >= len(activeVT) {
		panic("exce: vector table is too short")
	}
	activeVT[e] = VectorFor(handler)
	barrier.Sync()
}
コード例 #2
0
ファイル: main.go プロジェクト: rjammala/emgo
func main() {
	setup.Performance(0)

	periph.AHBClockEnable(periph.GPIOB)
	periph.AHBReset(periph.GPIOB)

	LED.SetMode(Blue, gpio.Out)
	LED.SetMode(Green, gpio.Out)

	vt := exce.NewTable(16)
	vt[exce.NMI] = exce.VectorFor(defaultHandler)
	vt[exce.HardFault] = exce.VectorFor(defaultHandler)
	vt[exce.SysTick] = exce.VectorFor(sysTickHandler)
	exce.UseTable(vt[:])

	_, _, tenms := systick.Calib()
	tenms *= 10 // stm32l1 returns value for 1 ms not for 10ms.
	systick.SetReload(tenms * 100)
	systick.SetFlags(systick.Enable | systick.TickInt)

	// Sleep forever.
	sleep.EnableSleepOnExit()
	barrier.Sync() // not necessary on Cortex-M0,M3,M4
	sleep.WFI()

	// Execution should never reach there so the green LED
	// should never light up.
	LED.SetBit(Green)
}
コード例 #3
0
ファイル: tasker-cortexm.go プロジェクト: rjammala/emgo
func (ts *taskSched) init() {
	var vt []exce.Vector
	vtlen := 1 << irtExp()
	vtsize := vtlen * int(unsafe.Sizeof(exce.Vector{}))

	Heap = allocTop(
		unsafe.Pointer(&vt), Heap,
		vtlen, unsafe.Sizeof(exce.Vector{}), unsafe.Alignof(exce.Vector{}),
		uintptr(vtsize),
	)
	if Heap == nil {
		panicMemory()
	}

	Heap = allocTop(
		unsafe.Pointer(&ts.tasks), Heap,
		MaxTasks(), unsafe.Sizeof(taskInfo{}), unsafe.Alignof(taskInfo{}),
		unsafe.Alignof(taskInfo{}),
	)
	if Heap == nil {
		panicMemory()
	}

	// Set taskInfo for initial (current) task.
	ts.tasks[0].prio = 255
	ts.tasks[0].setState(taskReady)

	// Use PSP as stack pointer for thread mode.
	cortexm.SetPSP(unsafe.Pointer(cortexm.MSP()))
	barrier.Sync()
	cortexm.SetCtrl(cortexm.Ctrl() | cortexm.UsePSP)
	cortexm.ISB()

	// Now MSP is used only by exceptions handlers.
	cortexm.SetMSP(unsafe.Pointer(initSP(len(ts.tasks))))

	// Setup interrupt table.
	// Consider setup at link time using GCC weak functions to support Cortex-M0
	// and (in case of Cortex-M3,4) to allow vector load on the ICode bus
	// simultaneously with registers stacking on DCode bus.
	vt[exce.NMI] = exce.VectorFor(nmiHandler)
	vt[exce.HardFault] = exce.VectorFor(hardFaultHandler)
	vt[exce.MemFault] = exce.VectorFor(memFaultHandler)
	vt[exce.BusFault] = exce.VectorFor(busFaultHandler)
	vt[exce.UsageFault] = exce.VectorFor(usageFaultHandler)
	vt[exce.SVCall] = exce.VectorFor(svcHandler)
	vt[exce.PendSV] = exce.VectorFor(pendSVHandler)
	vt[exce.SysTick] = exce.VectorFor(sysTickHandler)
	exce.UseTable(vt)

	exce.MemFault.Enable()
	exce.BusFault.Enable()
	exce.UsageFault.Enable()

	exce.SVCall.SetPrio(exce.Lowest)
	exce.PendSV.SetPrio(exce.Lowest)

	sysTickStart()
	tasker.forceNext = -1
	tasker.run()
}