func runAssembler() {
flag.Parse()
srcPath := flag.Arg(1)
if srcPath == "" {
printHelp("assemble")
return
}
src, err := ioutil.ReadFile(srcPath)
assert(err)
var destWriter io.Writer
destPath := flag.Arg(2)
if destPath == "" {
destWriter = os.Stdout
} else {
destWriter, err = os.Open(destPath)
assert(err)
}
gen, err := assembler.Assemble(src)
assert(err)
genReader := words.NewReadWriter(gen)
_, err = io.Copy(destWriter, genReader)
assert(err)
}
func runDebugger() {
flag.Parse()
path := flag.Arg(1)
if path == "" {
printHelp("debug")
return
}
file, err := os.Open(path)
assert(err)
dcpu := emulator.NewDCPU()
ram := words.NewReadWriter(dcpu.RAM)
_, err = io.Copy(ram, file)
file.Close()
assert(err)
in := bufio.NewReader(os.Stdin)
for {
fmt.Print("(d) ")
buf, _, err := in.ReadLine()
line := string(buf)
if err == io.EOF {
return
}
assert(err)
switch line {
case "quit":
return
case "step":
err := dcpu.Step()
if err != nil {
fmt.Println("dcpu err: ", err)
}
case "steploop":
err := debugger.StepLoop(dcpu)
if err != nil {
fmt.Println("dcpu err: ", err)
}
case "stepjmp":
err := debugger.StepJmp(dcpu)
if err != nil {
fmt.Println("dcpu err: ", err)
}
case "mem":
words.Hexdump(dcpu.RAM, os.Stdout)
case "r":
debugger.RDump(dcpu)
case "op":
debugger.PrintInstruction(dcpu)
}
}
}
func runEmulator() {
flag.Parse()
path := flag.Arg(1)
if path == "" {
printHelp("emulate")
return
}
file, err := os.Open(path)
assert(err)
dcpu := emulator.NewDCPU()
ram := words.NewReadWriter(dcpu.RAM)
_, err = io.Copy(ram, file)
file.Close()
assert(err)
err = dcpu.Exec()
assert(err)
}