// OpStoreStackReg must not allocate registers. func (mach X86) OpStoreStackReg(code gen.OpCoder, t types.T, offset int32, reg regs.R) { switch t.Category() { case types.Int: Mov.opToStack(code, t, reg, offset) case types.Float: MovsSSE.opToStack(code, t, reg, offset) default: panic(t) } }
// OpGetGlobal must not update CPU's condition flags. func (mach X86) OpGetGlobal(code gen.RegCoder, t types.T, offset int32) values.Operand { reg, ok := code.TryAllocReg(t) if !ok { reg = regResult } if t.Category() == types.Int { Mov.opFromIndirect(code, t, reg, 0, NoIndex, regMemoryBase, offset) } else { MovSSE.opFromIndirect(code, t, reg, 0, NoIndex, regMemoryBase, offset) } return values.TempRegOperand(t, reg, true) }
// OpMoveReg must not allocate registers. func (mach X86) OpMoveReg(code gen.Coder, t types.T, targetReg, sourceReg regs.R) { if targetReg == sourceReg { panic("target and source registers are the same") } switch t.Category() { case types.Int: Mov.opFromReg(code, t, targetReg, sourceReg) case types.Float: MovsSSE.opFromReg(code, t, targetReg, sourceReg) default: panic(t) } }
func TypeRegCategory(t types.T) RegCategory { return RegCategory(t.Category() - 1) }